LSF0102DC-Q100H

• Provides bidirectional voltage translation with no direction pin
• Supports up to 100-MHz up translation and greater than 100-MHz down translationat≤ 30pF cap load and up To 40-MHz up/down translation at 50pF cap load
• Allows bidirectional voltage-level translation between
  • 0.95 V ? 1.8/2.5/3.3/5 V
  • 1.2 V ? 1.8/2.5/3.3/5V
  • 1.8 V ? 2.5/3.3/5 V
  • 2.5 V ? 3.3/5 V
  • 3.3 V ? 5 V
• Low standbycurrent
• 5-V tolerance I/O port to support TTL
• Low RON provides less signaldistortion
• High-impedance I/O pins for EN = Low
• Flow-through pinout for easy PCB trace routing
• Latch-upperformance >100 mA per JESD 17
• –40°C to 125°C Operating temperature range

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The LSF family of devices supports bidirectional voltage translation without the need forDIR pin which minimizes system effort (for PMBus, I2C, SMBus, etc.). TheLSF family of devices supports up to 100-MHz up translation and greater than 100-MHz downtranslation at ≤ 30pF cap load and up to 40-MHz up/down translation at 50pF cap load which allowsthe LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levelsin industrial and telecom applications. The LSF family is able to set up different voltagetranslation levels on each channel which makes it very flexible.