The IS43TR16640A-15GBLI is a 1Gb DDR3 SDRAM supports 1333MT/s data rate. It has high speed data transfer rates with system frequency up to 933MHz, 8 internal banks for concurrent operation and 8-bit pre-fetch architecture. CK and CK# are differential clock inputs. All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of CK#. CKE HIGH activates and CKE Low deactivates, internal clock signals and device input buffers and output drivers. All commands are masked when CS# is registered HIGH. CS# provides for external Rank selection on systems with multiple Ranks. CS# is considered part of the command code. On Die Termination: ODT (registered HIGH) enables termination resistance internal to the DDR3 SDRAM. When enabled, ODT is only applied to each DQ, DQSU, DQSU#, DQSL, DQSL#, DMU and DML signal. The ODT pin will be ignored if MR1 and MR2 are programmed to disable RTT.
Feature
- VDD and VDDQ = 1.5V ±0.075V Standard Voltage
- VDD and VDDQ = 1.35V + 0.1V, -0.067V Low voltage (L)
- 5, 6, 7, 8, 9, 10 and 11 Programmable CAS latency
- 0, CL-1, CL-2 Programmable additive latency
- Programmable CAS WRITE latency (CWL) based on tCK
- 4 and 8 programmable burst length
- Sequential or interleave programmable burst sequence
- BL switch on the fly
- Auto Self Refresh (ASR)
- Self refresh temperature (SRT)
- Partial array self refresh
- Asynchronous RESET pin
- TDQS (termination data strobe) supported (x8 only)
- OCD (Off-Chip Driver impedance adjustment)
- Dynamic ODT (On-Die Termination)
- Driver strength - RZQ/7, RZQ/6 (RZQ = 240R)
- Write levelling
