The NLV74HCT125ADR2G is identical in pinout to the LS125. The device inputs are compatible with standard CMOS and LSTTL outputs. The NLV74HCT125ADR2G noninverting buffer is designed to be used with 3 state memory address drivers, clock drivers, and other bus oriented systems. The devices have four separate output enables that are active low.
Feature
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 µA
- High Noise Immunity Characteristic of CMOS Devices
- In Compliance with the JEDEC Standard No. 7A Requirements
- Chip Complexity: 72 FETs or 18 Equivalent Gates
- These are PbFree Devices
Applications