■ HIGH SPEED: fMAX = 300MHz (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)
■ 50Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN)
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC74TTR is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and Q OUTPUTS during the positive goingtransition of the clock pulse.
CLEAR and PRESET are independent of the clock and accomplished by a low setting on the appropriate input.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
