All other trademarks are the property of their respective owners.
DescriptionThe TLV810SDBZR family of supervisory circuits provides circuit initialization and timing supervision, primarily for DSPs and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage VIT.An internal timer delays the return of the output to the inactive state (low) to ensure proper system reset. The delay time (td(typ) = 200 ms) starts after VDD has risen above the threshold voltage, VIT. When the supply voltage drops below the VIT threshold voltage, the output becomes active (high) again. No external components are required. All the devices in this family have a fixed sense-threshold voltage (VIT) set by an internal voltage divider.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in a 3-pin SOT-23 package. The TLV810SDBZR devices are characterized for operation over a temperature range of –40°C to +125°C.
Feature
- 3-Pin SOT23 Package
- Supply Current: 9 μA (Typical)
- Precision Supply Voltage Monitor: 2.5 V, 3 V, 3.3 V, 5 V
- Power-On Reset Generator with Fixed Delay Time of 200 ms
- Pin-for-Pin Compatible with MAX810
- Temperature Range: –40°C to +125°C
- Push-Pull, RESET Output
- DSPs, Microcontrollers, and Microprocessors
- Wireless Communication Systems
- Portable/Battery-Powered Equipment
- Programmable Controls
- Intelligent Instruments
- Industrial Equipment
- Notebook and Desktop Computers
- Automotive Systems
All other trademarks are the property of their respective owners.
DescriptionThe TLV810 family of supervisory circuits provides circuit initialization and timing supervision, primarily for DSPs and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage VIT.An internal timer delays the return of the output to the inactive state (low) to ensure proper system reset. The delay time (td(typ) = 200 ms) starts after VDD has risen above the threshold voltage, VIT. When the supply voltage drops below the VIT threshold voltage, the output becomes active (high) again. No external components are required. All the devices in this family have a fixed sense-threshold voltage (VIT) set by an internal voltage divider.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in a 3-pin SOT-23 package. The TLV810 devices are characterized for operation over a temperature range of –40°C to +125°C.
