STM32G071怎样通过DWT实现us精准定时？

M0,M0+内核确定支持DWT吗？

先看看M0的手册

M0+手册 37.8 DWT (Data Watchpoint) The Cortex**®**-M0+ DWT implementation provides two watchpoint register sets. 37.8.1 DWT functionality The processor watchpoints implement both data address and PC based watchpoint functionality, a PC sampling register, and support comparator address masking, as described in the **ARMv6-M Arm**. 37.8.2 DWT Program Counter Sample Register A processor that implements the data watchpoint unit also implements the ARMv6-M optional **DWT Program Counter Sample Register **(DWT_PCSR). This register permits a debugger to periodically sample the PC without halting the processor. This provides coarse grained profiling. See the **ARMv6-M Arm **for more information. The Cortex**®**-M0+ DWT_PCSR records both instructions that pass their condition codes and those that fail

通过研究CM0+ 手册可以看到，这个DWT在CM0+内核上是个最基本的数据观察点单元。它没有 DWT_CYCCNT这个PC采样周期计数器，所以没有计数功能，同样比较器也只有地址比较功能。所以它仅仅能实现PC地址匹配功能，无法实现计数（计时）功能。 这个功能在更高级的内核上都有（CM3.CM4.......）