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CD74HC4520E

  • 描述:逻辑类型: 二进制计数器 电源电压: 2 V ~ 6 V 每个元件的位数: four 计数速度率: 35兆赫 供应商设备包装: 16-PDIP 安装类别: 通孔
  • 品牌:
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 1023

数量 单价 合计
1023+ 2.10044 2148.75114
  • 库存: 19992
  • 单价: ¥2.10044
  • 数量:
    - +
  • 总计: ¥2,148.75
在线询价

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规格参数

  • 制造厂商
  • 部件状态 过时的
  • 逻辑类型 二进制计数器
  • 定向 向上的
  • 工作温度 -55摄氏度~125摄氏度
  • 安装类别 通孔
  • 每个元件的位数 four
  • 重置 异步
  • 定时 同步的
  • 供应商设备包装 16-PDIP
  • 电源电压 2 V ~ 6 V
  • 元件数量 two
  • 正反器类别 阳性、阴性
  • 包装/外壳 16-DIP(0.300英寸,7.62毫米)
  • 计数速度率 35兆赫

CD74HC4520E 产品详情

The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3 to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.

Feature

  • Positive or Negative Edge Triggering
  • Synchronous Internal Carry Propagation
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il1μA at VOL, VOH
Description

The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3 to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.

CD74HC4520E所属分类:计数器/触发器芯片,CD74HC4520E 由 设计生产,可通过久芯网进行购买。CD74HC4520E价格参考¥2.100441,你可以下载 CD74HC4520E中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询CD74HC4520E规格参数、现货库存、封装信息等信息!
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